The present invention relates generally to data conversion circuits for converting a data stream having a first width into a data stream having a second width. More particularly, the present invention relates to a data conversion circuit for converting an N-bit data stream received at a first clock rate into an M-bit data stream having a second clock rate, which provides end of frame detection and which minimizes a potential for loss of data.
In telecommunications, it is often the case that a data stream having a first width (for example a byte data stream) needs to be converted to a data stream having a second width (for example a word data stream). An example is a High Level Data Link Control (HDLC) core which receives data one byte (an 8-bit set of data) at a time. Eventually, the data needs to be put into random access memory (RAM), for example by a direct memory access (DMA) device, which is likely to have a word (32-bit) or wider interface. Additionally, the HDLC data is on a different clock domain than the rest of the system. In this type of situation, it is also necessary to insure that two frames of data are not placed in the same word. Therefore, when an end of frame is detected, the remainder of the word must be padded so that the first byte of each frame starts on a fresh word.
Some conventional methods of converting data from a data stream having a first width to a data stream having a second width include a receiving device which receives data until an end of frame (EOF) designation is detected. Upon detection of the EOF designation, received data is automatically shifted from the receiving device. Conventional data conversion circuits of this type can suffer the following disadvantages. First, using these conventional data stream conversion circuits, if multiple one-byte frames occur back to back, the circuit only has one byte-time to retrieve the data to prevent data loss. In a communication system with several channels, each arbitrating for access to the system bus, one byte-time may not be enough and the data can be lost before it is retrieved by the system. Second, it is often the case that the receive clock stops at the end of a frame. If the receive clock stops before the data is shifted, the end of frame data can be lost.